What is a PSoC?
Today, someone came in to my office and asked me to explain what is a PSoC. Probably this is because I was proposing using them on his project and he wanted to know a little more about the component, but, he was also hinting at the proverbial questions “Why not an FPGA?” and “Why not a micro?”.
PSoC is a family of devices that bridge the gap between the traditional microcontroller and programmable logic ( FPGAs, CPLDs, etc), but I believe that it has even more to offer than just filling in a gap in those established technologies. PSoC provides the flexibility in design that regular microcontrollers can’t really touch. PSoC adds processing power without the complexity of writing, debugging, and verifying the HDL code for an FPGA.
From the work that I have done thus far using the PSoC, I can say that more often than not they offer more features at the same or lower cost than a traditional microcontroller. And on the instance when all things are equal, the development environment vastly exceeds any other that I have so far had the privilege of using. When choosing between AVR, PIC, STM32, or any of the other processors that I’ve used in the past, I always prefer using the PSoC Creator development environment over any other.
FPGAs and CPLDs have become pretty awesome lately; incorporating millions of gates, hard processor cores, DDR2 and DDR3, and PCIe they offer a nearly limitless bounty of virtual clay for the digital artist to mold into almost anything. FPGAs, however, have a dark secret — Power Rails. Many FPGAs today require a 1.2V or 0.9V core voltage, plus a PLL reference voltage and an I/O voltage. The problem becomes more severe when using DDR2 or DDR3 or SERDES, since often they require a separate voltage references, increasing the number of supply rails to 4, 5 or more in some instances. When dealing with these devices one must be careful to read the requirements for power. It is not uncommon for an FPGA to require 0.9V at about 3A with 0.1% tolerance on the regulation. All that equals complexity and cost for the target board’s power designer. Why should I use one then? Simple. Your design requires huge amounts of I/O, requires high-speed digital hardware processing, Real-Time DSP operation on a sample stream or some other operation requiring either a complex custom interface, high speed IO, or high IO count that can’t be addressed using an alternate device. Basically, your design should use an FPGA when you NEED one.
The same can be said about microcontrollers. However, the line is a little more blurry between a PSoC and a traditional microcontroller. For someone starting to consider PSoC for a design, spend the $10 to pick up a prototype kit CY8CKIT-059 (PSoC 5) or CY8CKIT-043 (PSoC 4M) or if your interested in BlueTooth SMART spend slightly more and try either a microMighty-BLE (coming soon!) or a PSoC Pioneer Kit (BLE edition) CY8CKIT-042-BLE. They are well worth the money spent and all will give you a wonderful introduction to PSoC. Once you’ve had a chance to play around with the Creator IDE or you already have some PSoC experience, my suggestion is to use the PSoC device that will perform to the level your application requires. Switch off to a STM32/PIC32MZ/SAM when you need something with a bit more core kick than the PSoC can offer.
When you application needs a Cortex-M4 or a Cortex-M7, look for an alternate device (Cypress doesn’t presently have PSoC devices with these cores). But, I must caution that when trading between a PSoC 5 (80 MHz Cortex-M3) and a Cortex-M4 ( 80 MHz + DSP) or Cortex-M7 (200 MHz, DSP + FPU) its crucial to understand that the key features of the PSoC may make it a non-obvious choice. At first, the PSoC may appear to be inferior but it offers a potential parallel hardware path through the programmable UDBs that may be even more beneficial to the end application than using a higher performance processor core.
I’ve done many trade studies comparing PSoC to alternate microcontroller families and even FPGAs and more often than expected the PSoC is selected as the best solution. In one instance I was able to convert a system that used 100 MHz+ ADC sampling and a Cyclone 5 GX FPGA to a single PSoC 5LP (Cy8C5888AXI-L099) by understanding the operations they were trying to execute, understanding what the PSoC brings to the table, and taking advantage of the analog and programmable digital fabric within the PSoC devices. The end result is that a single 80 MHz PSoC 5LP replaced a digital system that had 5 power rails, FPGA, high-speed ADCs, and an external microcontroller. Ultimately this resulted in a lower component cost, lower dissipated power, smaller footprint, simpler PWB design and a better product for the end customer.